IV Semester B.Tech.
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Rajasthan Institute of Engineering
& Technology, Jaipur
(Approved
by AICTE and Affiliated to RTU,
|
COURSE SCHEDULE (TFTT)
Subject: Electro
Magnetic Field Theory
|
Year : II
|
Sem :IV
|
1. Name
of the Faculty : Akash Saxena
2. Designation : Associate Professor
3. Department : Electrical & Electronics Engineering
The Schedule for the Course /
Subject is:
S.No.
|
Description/Units
|
Sub
topic
|
Expected
Date of Completion
|
Revision
Date
|
Total
No. of Periods
|
1.
|
Introduction
|
1.
Vector Relation in rectangular,
cylindrical, spherical and general curvilinear coordinates system.
2.
Concept and physical interpretation
of gradient, Divergence and curl
3.
Green’s & Stoke’s theorems
|
25-02-2013
26-02-2013
27-02-2013
28-02-2013
03-03-2013
04-03-2013
05-03-2013
07-03-2013
|
10
|
|
2.
|
Electrostatics
|
1. Electric
field intensity & flux density.
2. Electric
field due to various charge configurations.
3. The
potential functions and displacement vector.
4. Gauss’s
law. Poisson’s and Laplace’s equation and their solution.
5. Uniqueness
theorem. Continuity equation. Capacitance and electrostatics energy.
6. Field
determination by method of images. Boundary conditions.
7.
Field mapping and concept of field cells
|
08-03-2013
11-03-2013
12-03-2013
13-03-2013
14-03-2013
15-03-2013
15-03-2013
17-03-2013
18-03-2013
19-03-2013
19-03-2013
20-03-2013
|
12
|
|
3.
|
Magneto statics
|
|
21-03-2013
22-03-2013
01-04-2013
02-04-2013
03-04-2013
03-04-2013
04-04-2013
05-04-2013
08-04-2013
08-04-2013
|
10
|
|
4.
|
Time varying fields
|
|
08-04-2013
09-04-2013
11-04-2013
11-04-2013
12-04-2013
12-04-2013
15-04-2013
16-04-2013
|
08
|
|
5.
|
Radiation,
EMI and EMC
|
|
17-04-2013
18-04-2013
19-04-2013
22-04-2013
23-04-2013
24-04-2013
25-04-2013
26-04-2013
|
08
|
(Akash Saxena)
HOD, EEE
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Rajasthan Institute of Engineering
& Technology, Jaipur
(Approved
by AICTE and Affiliated to RTU,
|
COURSE SCHEDULE (TFTT)
Subject: Digital
Electronics
|
Year : II
|
Sem :IV
|
1. Name
of the Faculty : Vikas Saini
2. Designation : Lecturer
3. Department : Electrical & Electronics Engineering
The Schedule for the Course /
Subject is:
S.No.
|
Description/Units
|
Sub
topic
|
Expected
Date of Completion
|
Revision
Date
|
Total
No. of Periods
|
1.
|
.
NUMBER SYSTEMS AND CODES
|
1.
Radix and Radix conversions
2.
sign, magnitude &
complement notation
3. codes,Weighted
and non-weighted codes, BCD codes, self-complementing
4. error detecting and correcting codes, ASCII
& EBCDIC codes
5. Alphanumeric
codes. Fixed point and floating point arithmetic,BCD
|
25-02-2013
26-02-2013
27-02-2013
28-02-2013
03-03-2013
04-03-2013
05-03-2013
07-03-2013
|
|
10
|
2.
|
. BOOLEAN ALGEBRA AND
DIGITAL LOGIC GATES
|
1. postulates of Boolean algebra
Features
of Boolean algebra,
2. theorems of Boolean algebra.
Fundamental logic gates, derived logic gates
3. logic diagrams and Boolean
expressions. Converting logic diagrams to universal logic positive, negative
and mixed logic
4. MINIMIZATION TECHNIQUES: Minterm,
Maxterm,
Karnaugh’s maps, simplification of logic functions with K-map
5. tables in SOP & POS forms,
incompletely specified functions, variable mapping, Quinn-
Mcklusky
method.
,
conversions of truth tables in SOP & POS forms, incompletely specified
functions, variable mapping, Quinn-
Mcklusky
method.
|
08-03-2013
11-03-2013
12-03-2013
13-03-2013
14-03-2013
15-03-2013
15-03-2013
17-03-2013
18-03-2013
19-03-2013
19-03-2013
20-03-2013
|
|
12
|
3.
|
. SWITCHING CIRCUITS AND
LOGIC FAMILIES
|
3. RTL, TTL, open collector TTL
Subfamilies
5. , MOS, CMOS, ECL IIL.
|
21-03-2013
22-03-2013
01-04-2013
02-04-2013
03-04-2013
03-04-2013
04-04-2013
05-04-2013
08-04-2013
08-04-2013
|
|
10
|
4.
|
. COMBINATION SYSTEMS
|
1. Combinational
logic circuit design
2.
Half and full
adder & subtractors
3.
Binary serial and parallel adders, BCD adder.
4.
Binary multiplier, comparator
5.
decoders, encoders, multiplexer
6.
de-multiplexer, Code converters.
|
08-04-2013
09-04-2013
11-04-2013
11-04-2013
12-04-2013
12-04-2013
15-04-2013
16-04-2013
|
|
08
|
5.
|
SEQUENTIAL
SYSTEMS
|
1. Latches,
Flip-Flop: R-S, D, J-K, T, Master slave.
2. Flip-flop
conversions
3.
Counters: asynchronous & synchronous counter
4. Counter design, counter
applications.
Registers: buffer & shift register.
|
17-04-2013
18-04-2013
19-04-2013
22-04-2013
23-04-2013
24-04-2013
25-04-2013
26-04-2013
|
|
08
|
![]()
Rajasthan Institute of Engineering
& Technology, Jaipur
(Approved
by AICTE and Affiliated to RTU,
|
COURSE SCHEDULE (TFTT)
Subject: Applied
Electronics
|
Year : II
|
Sem :IV
|
1. Name
of the Faculty : Pragati Vijay
2. Designation : Lecturer
3. Department : Electrical & Electronics Engineering
The Schedule for the Course /
Subject is:
S.No.
|
Description/Units
|
Sub
topic
|
Expected
Date of Completion
|
Revision
Date
|
Total
No. of Periods
|
1.
|
Feed
Back Amplifiers
|
1.
Classification, Feedback concept
2.
Transfer gain with feedback
3.
General characteristics of negative
feedback amplifiers.
4.
Analysis of voltage-series
5.
Analysis of voltage shunt
6.
Analysis of current-series
7.
Analysis of current-shunt feedback
amplifier
8.
Stability criterion
|
26/02/13
27/02/13
28/02/13
01/03/13
05/03/13
06/03/13
07/03/13
08/03/13
12/03/13
|
|
9
|
2.
|
Oscillators
|
|
13/03/13
14/03/13
15/03/13
19/03/13
20/03/13
21/03/13
22/03/13
26/03/13
28/03/13
29/03/13
02/04/13
03/04/13
|
|
12
|
3.
|
High Frequency Amplifier
|
|
19/04/13
23/04/13
24/04/13
25/04/13
26/04/13
30/04/13
01/05/13
|
|
7
|
4.
|
Digital Logic
Gate Characteristics
|
|
02/05/13
03/05/13
07/05/13
08/05/13
09/05/13
10/05/13
14/05/13
15/05/13
16/05/13
17/05/13
21/05/13
22/05/13
23/05/13
24/05/13
28/05/13
|
|
15
|
5.
|
Power Amplifiers
|
|
04/04/13
05/04/13
09/04/13
10/04/13
11/04/13
12/04/13
16/04/13
17/04/13
18/04/13
|
|
9
|
![]()
Rajasthan Institute of Engineering
& Technology, Jaipur
(Approved
by AICTE and Affiliated to RTU,
|
COURSE SCHEDULE (TFTT)
Subject: Linear
Integrated Circuit
|
Year : II
|
Sem :IV
|
1. Name
of the Faculty : Pragati Vijay
2. Designation : Lecturer
3. Department : Electrical & Electronics Engineering
The Schedule for the Course /
Subject is:
S.No.
|
Description/Units
|
Sub
topic
|
Expected
Date of Completion
|
Revision
Date
|
Total
No. of Periods
|
1.
|
Operational
Amplifier
|
1. Basic
differential amplifier analysis,
2. Single
ended Configuration
3. Double
ended configurations
4. Op-amp
configurations with feedback
5. Op-amp
parameters
6. Inverting
and Non-Inverting configuration
7. Comparators
8. Adder
|
25/02/13
26/02/13
28/02/13
1/03/13-4/03/13
5/03/13-
08/03/13
11/03/13
12/03/13
14/03/13
|
|
10
|
2.
|
Operational
Amplifier Applications
|
|
15/03/13
18/03/13
21/03/13
22/03/13
25/03/13
26/03/13
28/03/13
29/03/13
01/04/13
02/04/13
04/04/13
|
|
11
|
3.
|
Active
Filters
|
|
05/04/13
08/04/13
09/04/13
11/04/13
12/04/13
15/04/13
16/04/13
|
|
7
|
4.
|
Phase
Locked Loops
|
|
06/05/13
07/05/13
09/05/13
10/05/13
13/05/13
14/05/13
16/05/13
17/05/13
20/05/13
21/05/13
23/05/13
24/05/13
27/05/13
|
|
13
|
5.
|
Linear IC’s
|
|
18/04/13
19/04/13
22/04/13
23/04/13
25/04/13
26/04/13
29/04/13
30/04/13
02/05/13
03/05/13
|
|
10
|
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